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Kolloquium des Studiendekanats Elektrotechnik, Informatik und Mathematik (EIM)

Wir freuen uns im Rahmen des Kolloquiums des Studiendekanats Elektrotechnik, Informatik und Mathematik der Technischen Universität Hamburg (TUHH), eine weitere Antrittsvorlesung und einen Forschungsvortrag aus dem Bereich der Betriebssysteme und System-Software zu teilen. Dieses Kolloquium des Dekanats EIM beginnt am

Freitag, den 21. Oktober 2022 ab 13:00 Uhr

mit folgendem kurzen Programm:

  • 13:00 Uhr: Antrittsvorlesung „A Perspective on Performance, Power, and Energy Efficiency of GPUs“.
    Prof. Sohan Lal, Massively Parallel Systems Group, Technische Universität Hamburg (TUHH)
  • 13:45 Uhr: Portable Heterogeneous Programming for the Computing Continuum.
    Prof. Biagio Cosenza, Dipartimento di Informatica, University of Salerno, Italy

Alle Vorträge werden mittels Zoom live für die Öffentlichkeit über das Internet übertragen, interessierte Personen können sich zum Erhalt der Zugangsdaten hier anmelden: https://lists.tuhh.de/sympa/subscribe/kolloq.eim

A Perspective on Performance, Power, and Energy Efficiency of GPUs

Graphics Processing Units (GPUs) were initially designed as accelerators for graphics applications, however, their massive computational power made them attractive for general-purpose computing tasks such as scientific simulations. Today, GPU-accelerated systems are present everywhere – for example, in our smartphones, cars, and supercomputers. GPU-accelerated systems are transforming the world in many ways and several exciting possibilities such as digital twins, and precision medicine are on the horizon. While GPU-accelerated systems are desirable, if these massively parallel processors are not utilized properly, they are very expensive in terms of power and energy consumption, which is not good as we aspire to reduce our carbon footprint.

Figure 1: GPU-accelerated systems.

In his inaugural lecture, Sohan Lal will talk about the performance, power, and energy efficiency of GPUs. To enable energy efficiency research for GPUs, we developed a flexible and accurate GPU power simulator. Using the simulator, we investigate key bottlenecks that cause low performance and low energy efficiency, highlighting the wide gap between the achieved energy efficiency of GPUs and the energy-efficiency aim of exascale computing. Finally, Sohan Lal will discuss the highlights of his research to increase the performance and energy efficiency of GPUs.

Figure 2: Power Measurement Testbeds developed for power measurement and validation of power estimation simula-tors. These testbeds were developed during the EU-funded projects on low-power parallel computing on GPUs at the Berlin Institute of Technology (Technische Universität Berlin). The left testbed is for embedded platforms and the right one is for discrete GPUs.

Sohan Lal leads the Massively Parallel Systems Group at TUHH since September 2021, where he and his team investigate and teach in the field of computer architecture, focusing on massively parallel systems. His main research topics include:

  • Energy-efficient multi-/many-core processors such as GPUs
  • Applying machine learning for microarchitecture improvements
  • Power and performance modeling
  • Runtime support for HPC clusters
  • Heterogeneous computing (porting/optimizing applications)
  • Memory systems, approximate computing, GPU security

Ansprechpartner:

Prof. Sohan Lal
Massively Parallel Systems Group
Technische Universität Hamburg (TUHH)
sohan.lal@tuhh.de
https://www.mps.tuhh.de            

Portable Heterogeneous Programming for the Computing Continuum

Recent technological advances such as high-throughput 5G networks and powerful embedded accelerators have disrupted existing computing models, moving to new systems comprised of millions of distributed IoT and edge devices interconnected to supercomputers and cloud systems. In this context, the novel paradigm of computing continuum arises as a paradigm shift, where applications require interactive on-demand orchestration of decentralized tasks running on a variety of heterogeneous devices, from embedded systems to high-performance computing. While these diverse heterogeneous devices are being pulled close together into what will become a seamless execution environment, the continuum of computing demands programming models that will have to deal with several challenges; in particular, they will have to target a broad range of devices, from micro- and meta-edge embedded devices to high-end GPUs.

This talk introduces a C++-based, high-level programming environment based on the Khronos SYCL standard, which can be used for portable parallel programming of heterogeneous devices and can target embedded GPUs, FPGAs, high-end multi-cores, and GPUs from NVIDIA, AMD, and Intel. After introducing the difference between portability and performance portability, we propose a set of SYCL extensions that deal with the key aspects of the computing continuum: the workload distribution (Celerity); energy efficiency (SYnergy); support for approximated computing acceleration, and multi-objective automatic tuning.

Bio:

Biagio Cosenza is an Assistant Professor at the Department of Computer Science, University of Salerno, Italy. From 2015–2019, he was a Senior Researcher at TU Berlin, where he led the CELERITY project funded by DFG. He also received his Habilitation in Computer Science from TU Berlin. From 2011- 2015, he was a Post-Doctoral Researcher at the University of Innsbruck, Austria, contributing to the Insieme Compiler and the DK-CIM scientific platform. He received his Ph.D. from the University of Salerno in 2011, visiting the HLRS supercomputing center and the University of Stuttgart. He has been a recipient of several scholarships (HPC-Europa2, HPC-Europa++, DAAD), computational grants (CINECA ISCRA, JSC, PRACE-PA), and other grants (two best-paper selections, a runner-up of outstanding paper, a performance award at TU Berlin).

He is currently a member of the Khronos SYCL Working Group, contributing to the SYCL 2020 standard specification. He is also an ACM Senior Member, as well as a member of SIGHPC, ACM-W, IEEE, Khronos Group, HiPEAC, and two CINI Labs ("HPC: Key Technologies and Tools" and "Embedded Systems & Smart Manufacturing"). He authored more than 40 publications and he is currently a unit leader in the EuroHPC project LIGATE. His research interests include programming models for High-Performance Computing and Embedded Systems, GPU and heterogeneous computing, and compiler technology.

Ansprechpartner:

Prof. Dr. Biagio Cosenza
Dipartimento di Informatica
University of Salerno, Italy
bcosenza@unisa.it