2016
Daniel Ziener JV,
Weber H.
FPGA-Based Dynamically Reconfigurable SQL Query Processing..
ACM Transactions on Reconfigurable Technology and Systems (TRETS)..
2016 Aug.;
9.((4),):25:1-25:24.
[DOI]
Dirk Koch DZ,
Hannig F.
FPGA versus Software Programming: Why, When, and How?.. In:
In Dirk Koch, Frank Hannig and Daniel Ziener (Eds.), editors.
FPGAs for Software Programmers.
Springer;
2016 Jun..
p. 1-21.
[DOI]
Dirk Koch FH,
Ziener D.
FPGAs for Software Programmers..
Springer;
2016 Jun..
[DOI]
Dominic Oehlert AL,
Falk H.
Practical Challenges of ILP-based SPM Allocation Optimizations.. In:
In Proceedings of the 19th International Workshop on Software & Compilers for Embedded Systems (SCOPES).
St. Goar / Germany:
2016 May.
p. 86-89.
[DOI]
Eberle Rambo SS,
Ernst R.
Providing Formal Latency Guarantees for ARQ-based Protocols in Networks-on-Chip.. In:
In Proceedings of Design, Automation and Test in Europe (DATE).
Dresden / Germany:
2016 Jan..
p. 103-108.
TODO
TODO
TODO
Heiko Falk PW,
Wegener S.
TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research.. In:
In Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis (WCET).
Toulouse / France:
2016 Jul..
p. 2:1-2:10.
[DOI]
Jorge Echavaria JT,
Ziener D.
FAU: Fast Approximate Adder Units on LUT-Based FPGAs.. In:
In Proceedings of the International Conference on Field Programmable Technology (FPT).
Xi'an / China:
2016 Dec..
Posewsky T,
Ziener D.
Efficient Deep Neural Network Acceleration through FPGA-based Batch Processing.. In:
In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig).
Cancun / Mexico:
2016 Dec..
Wolfgang Büter DO,
García-Ortiz A.
ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition.. In:
In Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).
Tallinn / Estonia:
2016 Jun..
p. 1-6.
[DOI]
2015
Andreas Becher KM,
Teich J.
A Co-Design Approach for Accelerated SQL Query Processing via FPGA-based Data Filtering.. In:
In Proceedings of the International Conference on Field-Programmable Technology (FPT).
Queenstown / New Zealand:
2015 Dec..
[DOI]
Andreas Becher DZ,
Teich J.
Approximate Adder Structures on FPGAs.. In:
In Proceedings of the Workshop on Approximate Computing (AC).
Paderborn / Germany:
2015 Oct..
Luppold A,
Falk H.
Schedulability aware WCET-Optimization of Periodic Preemptive Hard Real-Time Multitasking Systems.. In:
In Proceedings of the 18th International Workshop on Software & Compilers for Embedded Systems (SCOPES).
St. Goar / Germany:
2015 Jun..
p. 101-104.
[DOI]
Luppold A,
Falk H.
Code Optimization of Periodic Preemptive Hard Real-Time Multitasking Systems.. In:
In Proceedings of the 18th International Symposium on Real-Time Distributed Computing (ISORC).
Auckland / New Zealand:
2015 Apr..
p. 35-42.
[DOI]
Che-Wei Chang TK,
Falk H.
Real-Time Task Scheduling on Island-Based Multi-Core Platforms..
IEEE Transactions on Parallel and Distributed Systems (TPDS)..
2015 Feb.;
26.((2),):538-550.
[DOI]