2022

  • Shashank Jadhav and Heiko Falk (2022). Approximating WCET and Energy Consumption for Fast Multi-Objective Memory Allocation. In Proceedings of the 30th International Conference on Real-Time Networks and Systems (RTNS) Paris / France 162-172 [Abstract] [BibTex]

  • Heiko Falk and Max Gandyra (2022). haRTStone - Benchmark Classification Datasets. Zenodo [BibTex]

  • Heiko Falk and Max Gandyra (2022). haRTStone - Feature Extractor Software. Zenodo [BibTex]

  • Heiko Falk and Max Gandyra (2022). haRTStone - Collection of Existing ANSI-C Benchmarks. Zenodo [BibTex]

  • Ahmad Al-Zoubi and Goerschwin Fey (2022). Low Latency Real-Time Inference for Multilayer Perceptrons on FPGAs. Int'l Workshop on Boolean Problems (IWSBP) [BibTex]

  • Swantje Plambeck and Lutz Schammer and Goerschwin Fey (2022). On the Viability of Decision Trees for Learning Models of Systems. ASP Design Automation Conference (ASPDAC) [BibTex]

  • G. Martino and A. Bellandi and A. Eichler and J. Branlard and H. Schlarb and L. Doolittle and S. Aderhold and S. Hoobler and J. Nelson and R. D. Porter and L. Zacarias and A. Benwell and D. Gonnella and A. Ratti and G. Fey (2022). Anomaly Detection Based Quench Detection System for CW Operation of SRF Cavities. International Linear Accelerator Conference (LINCAC) [BibTex]

  • Jakob Schyga and Swantje Plambeck and Johannes Hinckeldeyn and Goerschwin Fey and Jochen Kreutzfeldt (2022). Decision Trees for Analyzing Influences on the Accuracy of Indoor Localization Systems. Indoor Positioning and Indoor Navigation (IPIN) [BibTex]

  • Ahmad Al-Zoubi and Gianluca Martino and Fin H. Bahnsen and Jun Zhu and Holger Schlarb and Goerschwin Fey (2022). CNN Implementation and Analysis on Xilinx Versal ACAP at European XFEL. IEEE International System-on-Chip Conference (SOCC) [BibTex]

  • Gianluca Martino and Ahmad Al Zoubi and Julien Branlard and Holger Schlarb and Goerschwin Fey (2022). FPGA-based hardware acceleration of machine learning algorithms for particle accelerators. Low-level RF Workshop [BibTex]

  • Goerschwin Fey and Martin Fränzle and Rolf Drechsler (2022). Self-explaination in Systems of Systems. International Workshop on Requirements Engineering for Explainable Systems (RE4ES) [BibTex]

  • Swantje Plambeck and Görschwin Fey and Jakob Schyga and Johannes Hinckeldeyn and Jochen Kreutzfeldt (2022). Explaining Cyber-Physical Systems Using Decision Trees. Computation-Aware Algorithmic Design for Cyber-Physical Systems (CAADCPS) [BibTex]

  • Lutz Schammer and Jan Runge and Paula Klimach and Goerschwin Fey (2022). Design Understanding: Identifying Instruction Pipelines in Hardware Designs. International Conference on Circuits and Systems Technologies (MOCAST) [BibTex]

  • Gianluca Martino and Goerschwin Fey (2022). Runtime Monitoring of c-LTL Specifications on FPGAs using HLS. International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD) [BibTex]

2021

  • Kateryna Muts and Heiko Falk (2021). Predicting Objectives on a Reduced Search Space of Multiobjective Function Inlining. In Proceedings of the 24th International Workshop on Software & Compilers for Embedded Systems (SCOPES) [Abstract] [BibTex]

  • Kateryna Muts and Heiko Falk (2021). Predicting Worst-Case Execution Times During Multi-Criterial Function Inlining. In Proceedings of the 7th International Conference on Machine Learning, Optimization, and Data Science (LOD) [Abstract] [BibTex]

  • Dominic Oehlert (2021). Worst Case Execution Time Oriented Code Optimization of Hard Real-Time Multicore Systems. Hamburg / Germany [Abstract] [BibTex]

  • Fin Hendrik Bahnsen and Goerschwin Fey (2021). YAPS - Your Open Examination System for Activating and emPowering Students. IEEE International Conference on Computer Science and Education (ICCSE) [BibTex]

  • Fin Hendrik Bahnsen and Jan Kaiser and Goerschwin Fey (2021). Designing Recurrent Neural Networks for Monitoring Embedded Devices. IEEE European Test Symposium (ETS) [BibTex]

  • Fin Hendrik Bahnsen and Vanessa Klebe and Goerschwin Fey (2021). Effect Analysis of Low-Level Hardware Faults on Neural Networks using Emulated Inference. International Conference on Circuits and Systems Technologies (MOCAST) [BibTex]

  • Arne Grünhagen and Julien Branlard and Annika Eichler and Gianluca Martino and Goerschwin Fey and Marina Tropmann-Frick (2021). Fault Analysis of the Beam Acceleration Control System at the European XFEL using Data Mining. Asian Test Symposium (ATS) [BibTex]

  • Gianluca Martino and Julien Branlard and Annika Eichler and Goerschwin Fey and Holger Schlarb (2021). Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems. EUROMICRO Symposium on Digital System Design (DSD) [BibTex]

  • Swantje Plambeck and Gianluca Martino and Goerschwin Fey (2021). Metrics for the Evaluation of Approximate Sequential Streaming Circuits. EUROMICRO Symposium on Digital System Design (DSD) [BibTex]

  • Swantje Plambeck and Lutz Schammer and Goerschwin Fey (2021). Extended Abstract: Viability of Decision Trees for Learning Models of Systems. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

  • Swantje Plambeck and Jakob Schyga and Johannes Hinckeldeyn and Jochen Kreutzfeldt and Goerschwin Fey (2021). Automata Learning for Automated Test Generation of Real Time Localization Systems. Workshop on Machine Learning in Control (Learning in Control, LEAC) [BibTex]

  • Lutz Schammer and Swantje Plambeck and Fin Hendrik Bahnsen and Goerschwin Fey (2021). Learning Models of Cyber-Physical Systems using Automata Learning. Software Engineering for Industrial Cyber-Physical Systems (SE4ICPS) [BibTex]

  • Ahmad Al-Zoubi and Goerschwin Fey and Konstantinos Tatas (2021). Resource-Aware Optimization of FPGA OpenCL Kernels. IEEE International Conference on Engineering and Emerging Technologies (ICEET) [BibTex]

2020

  • Dominic Oehlert, Edward Umaña Williams and Heiko Falk (2020). Work-In-Progress: Fine-Grained On-Chip Energy Measurement of a Real-Time Multi-Core Processor. In Brief Presentations of the 41st International IEEE Real-Time Systems Symposium (RTSS) [Abstract] [BibTex]

  • Heiko Falk, Shashank Jadhav, Arno Luppold, Kateryna Muts, Dominic Oehlert, Nina Piontek and Mikko Roth (2020). Compilation for Real-Time Systems a Decade After PREDATOR. Springer: [Abstract] [BibTex]

  • Arno Luppold (2020). Schedulability-Oriented Code Optimization of Hard Real-Time Multitasking Systems. Hamburg / Germany [Abstract] [BibTex]

  • Kateryna Muts and Heiko Falk (2020). Multi-Criteria Function Inlining for Hard Real-Time Systems. In Proceedings of the 28th International Conference on Real-Time Networks and Systems (RTNS) Paris / France 56-66 [Abstract] [BibTex]

  • Arno Luppold, Dominic Oehlert and Heiko Falk (2020). Compiling for the Worst Case: Memory Allocation for Multi-task and Multi-core Hard Real-time Systems. ACM Transactions on Embedded Computing Systems (TECS). 19. (2), [Abstract] [BibTex]

  • Fin Hendrik Bahnsen and Vanessa Klebe and Goerschwin Fey (2020). Emulation of Neural Networks under HW Faults. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

  • Gianluca Martino, Heinz Riener and Goerschwin Fey (2020). Revisiting Explicit Enumeration for Exact Synthesis. In Proceedings of Euromicro Conference on Digital System Design (DSD) Portorož / Slovenia [BibTex]

  • Merve Cakir and Karl-Heinz Zimmermann (2020). Stochastic Automata over Monoids. arXiv. [Abstract] [BibTex]

  • Merve Cakir and Karl-Heinz Zimmermann (2020). On the Decomposition of Generalized Semiautomata. arXiv. [Abstract] [BibTex]

  • Mehwish Saleemi, Merve Cakir and Karl-Heinz Zimmermann (2020). Dynamic Programming in Topological Spaces. arXiv. [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2020). On Krohn-Rhodes Theory for Semiautomata. arXiv. [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2020). Berechenbarkeit. Springer: [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2020). Computability Theory. TuBib: [Abstract] [BibTex]

2019

  • Shashank Jadhav, Mikko Roth, Heiko Falk, Christopher Brown and Adam Barwell (2019). Reasoning about non-functional properties using compiler intrinsic function annotations. In Proceedings of the 13th Junior Researcher Workshop on Real-Time Computing (JRWRTC) Toulouse / France 25-28 [Abstract] [BibTex]

  • Dominic Oehlert, Semla Saidi and Heiko Falk (2019). Code-Inherent Traffic Shaping for Hard Real-Time Systems. In Proceedings of the International Conference on Embedded Software (EMSOFT) Ney York City / USA [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2019). Curves, Cryptosystems and Quantum Computing. Hamburg University of Technology: [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2019). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Heiko Falk, Shashank Jadhav, Arno Luppold, Kateryna Muts, Dominic Oehlert, Nina Piontek and Mikko Roth (2019). Compilation for Real-Time Systems 10 Years After PREDATOR. Dortmund / Germany [BibTex]

  • Dominic Oehlert, Arno Luppold and Heiko Falk (2019). Favorable Adjustment of Periods for Reduced Hyperperiods in Real-Time Systems. In Proceedings of the 22nd International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 82-85 [Abstract] [BibTex]

  • Shashank Jadhav and Heiko Falk (2019). Multi-Objective Optimization for the Compiler of Real-Time Systems based on Flower Pollination Algorithm. In Proceedings of the 22nd International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 45-48 [Abstract] [BibTex]

  • Kateryna Muts, Arno Luppold and Heiko Falk (2019). Compiler-Based Code Compression for Hard Real-Time Systems. In Proceedings of the 22nd International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 72-81 [Abstract] [BibTex]

  • Robert Leppert and Karl-Heinz Zimmermann (2019). Inference in Graded Bayesian Networks. arXiv. [Abstract] [BibTex]

  • Vincent Knapps and Karl-Heinz Zimmermann (2019). Distributed Monitoring of Topological Events via Homology. arXiv. [Abstract] [BibTex]

  • Fin Hendrik Bahnsen and Goerschwin Fey (2019). Local Monitoring of Embedded Applications and Devices using Artificial Neural Networks. EUROMICRO Symposium on Digital System Design (DSD) 485-491 [BibTex]

  • Fin Hendrik Bahnsen and Goerschwin Fey (2019). Approximation of Neural Networks for Verification. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

  • Fin Hendrik Bahnsen and Goerschwin Fey (2019). Neural Networks for Monitoring Embedded Devices. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

  • Roderick Bloem and Goerschwin Fey and Fabian Greif and Robert Könighofer and Ingo Pill and Heinz Riener and Franz Röck (2019). Synthesizing Adaptive Test Strategies from Temporal Logic Specifications. Formal Methods in System Design (FMSD). [BibTex]

  • Goerschwin Fey and Rolf Drechsler (2019). Self-Explaining Digital Systems - Some Technical Steps. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

  • Goerschwin Fey and Rolf Drechsler (2019). Self-Explaining Digital Systems: Technical View, Implementation Aspects, and Completeness. In Rolf Drechsler and Mathias Soeken (Eds.) Advanced Boolean Techniques - Selected Papers from the 13th International Workshop on Boolean Problems Springer: [BibTex]

  • Goerschwin Fey and Alberto Garcia-Ortiz (2019). Symbolic Circuit Analysis under an Arc Based Timing Model. IEEE European Test Symposium (ETS) [BibTex]

  • Tara Ghasempouri and Jan Malburg and Alessandro Danese and Graziano Pravadelli and Goerschwin Fey and Jaan Raik (2019). Engineering of an Effective Automatic Dynamic Assertion Mining Platform. IEEE/IFIP Int'l Conference on VLSI and System-on-Chip (VLSI-SoC) [BibTex]

  • Tara Ghasempouri and Jan Malburg and Alessandro Danese and Graziano Pravadelli and Goerschwin Fey and Jaan Raik (2019). Engineering of an Effective Automatic Assertion-based Verification Platform. Workshop on Design Automation for Understanding Hardware Designs (DUHDe) [BibTex]

  • Gianluca Martino and Goerschwin Fey (2019). Syntax-Guided Enumeration of Temporal Properties. In Proceedings of Forum on Specification and Design Languages (FDL) Southampton / United Kingdom [BibTex]

  • Gianluca Martino, Heinz Riener and Görschwin Fey (2019). Complete Specification Mining. In Proceedings of Workshop on Design Automation for Understanding Hardware Designs (DUHDE) Florence / Italy [BibTex]

2018

  • Karl-Heinz Zimmermann (2018). Computations in Stochastic Acceptors. arXiv. [Abstract] [BibTex]

  • Arno Luppold, Dominic Oehlert and Heiko Falk (2018). Evaluating the Performance of Solvers for Integer-Linear Programming. Hamburg / Germany [Abstract] [BibTex]

  • Claire Pagetti, Julien Forget, Heiko Falk, Dominic Oehlert and Arno Luppold (2018). Automated generation of time-predictable executables on multi-core. In Proceedings of the 26th International Conference on Real-Time Networks and Systems (RTNS) Poitiers / France 104-113 [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2018). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Kateryna Muts, Arno Luppold and Heiko Falk (2018). Multi-Objective Optimization for the Compiler of Hard Real-Time Systems. In Proceedings of the 23rd International Symposium on Mathematical Programming (ISMP) Bordeaux / France [Abstract] [BibTex]

  • Dominic Oehlert, Arno Luppold and Heiko Falk (2018). Compilation for Real-Time Systems - An Overview of the WCET-Aware C Compiler WCC. In Proceedings of the 9th International Workshop on Analysis Tools and Methodologies for Embedded and Real-Time Systems (WATERS) Barcelona / Spain [Abstract] [BibTex]

  • Dominic Oehlert, Selma Saidi and Heiko Falk (2018). Compiler-Based Extraction of Event Arrival Functions for Real-Time Systems Analysis. In Proceedings of the 30th Euromicro Conference on Real-Time Systems (ECRTS) Barcelona / Spain 4:1-4:22 [Abstract] [BibTex]

  • Kateryna Muts, Arno Luppold and Heiko Falk (2018). Multi-Criteria Compiler-Based Optimization of Hard Real-Time Systems. In Proceedings of the 21st International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 54-57 [Abstract] [BibTex]

  • Dominic Oehlert, Arno Luppold and Heiko Falk (2018). Mitigating Data Cache Aging through Compiler-Driven Memory Allocation. In Proceedings of the 21st International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 58-61 [Abstract] [BibTex]

  • Mikko Roth, Arno Luppold and Heiko Falk (2018). Measuring and Modeling Energy Consumption of Embedded Systems for Optimizing Compilers. In Proceedings of the 21st International Workshop on Software & Compilers for Embedded Systems (SCOPES) St. Goar / Germany 86-89 [Abstract] [BibTex]

  • Dominic Oehlert and Heiko Falk (2018). WCET Analysis of Automotive Buses using WCC. In Proceedings of the DATE Workshop on New Platforms for Future Cars Dresden / Germany [Abstract] [BibTex]

  • Görschwin Fey, Tara Ghasempouri, Swen Jacobs, Gianluca Martino, Jaan Raik and Heinz Riener (2018). Design Understanding: From Logic to Specification. In Proceedings of IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) Verona / Italy [BibTex]

  • Karl Janson and Carl Johann Treudler and Thomas Hollstein and Jaan Raik and Maksim Jenihhin and Goerschwin Fey (2018). Software-Level TMR Approach for On-Board Data Processing in Space Applications. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) [BibTex]

  • Gianluca Martino, Heinz Riener and Görschwin Fey (2018). Coverage-Guided CTL Property Enumeration for Understanding Models of Reactive Systems. In Proceedings of International Workshop on Logic & Synthesis (IWLS) San Francisco / USA [BibTex]

  • Jan Malburg and Heinz Riener and Goerschwin Fey (2018). Mining Latency Guarantees for RTL Designs. IEEE Int'l Symposium on Multi-Valued Logic (ISMVL) [BibTex]

  • Abraham Temesgen Tibebu and Goerschwin Fey (2018). Augmenting All Solutions SAT Solving for Circuits with Structural Information. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) [BibTex]

2017

  • Karl-Heinz Zimmermann (2017). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Heiko Falk (2017). Timing Analysis and Code Optimization for Massively-Parallel Real-Time Systems. Stuttgart / Germany [BibTex]

  • Heiko Falk (2017). Compilation Techniques for Parallel, Safety-Critical Systems with Real-Time Constraints. Seoul / South Korea [BibTex]

  • Dominic Oehlert, Arno Luppold and Heiko Falk (2017). Bus-aware Static Instruction SPM Allocation for Multicore Hard Real-Time Systems. In Proceedings of the 29th Euromicro Conference on Real-Time Systems (ECRTS) Dubrovnik / Croatia 1:1-1:22 [Abstract] [BibTex]

  • Peter Marwedel, Heiko Falk, and Olaf Neugebauer (2017). Memory-Aware Optimization of Embedded Software for Multiple Objectives. Springer: [Abstract] [BibTex]

  • Arno Luppold and Heiko Falk (2017). Schedulability-Aware SPM Allocation for Preemptive Hard Real-Time Systems with Arbitrary Activation Patterns. In Proceedings of Design, Automation and Test in Europe (DATE) Lausanne / Switzerland 1074-1079 [Abstract] [BibTex]

  • Eberle Rambo, Selma Saidi and Rolf Ernst (2017). Designing Networks-on-Chip for High Assurance Real-Time Systems. In Proceedings of the International Symposium on Dependable computing (PRDC) Christchurch / New Zealand [Abstract] [BibTex]

  • Gökçe Aydos and Goerschwin Fey (2017). Empirical Results on Parity-based Soft Error Detection with Software-based Retry. Microprocessors and Microsystems (MICPRO). 62-68 [BibTex]

  • Serhiy Avramenko and Matteo Sonza Reorda and Massimo Violante and Goerschwin Fey (2017). A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. Journal of Electronic Testing: Theory and Applications (JETTA). 53-64 [BibTex]

  • Tino Flenker and Goerschwin Fey (2017). Mapping Abstract and Concrete Hardware Models for Design Understanding. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) [BibTex]

  • Tino Flenker and Jan Malburg and Görschwin Fey and Serhiy Avramenko and Massimo Violante and Matteo Sonza Reorda (2017). Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. IEEE Annual Symposium on VLSI (ISVLSI) [BibTex]

  • Jan Malburg and Tino Flenker and Goerschwin Fey (2017). Property Mining using Dynamic Dependency Graphs. ASP Design Automation Conference (ASPDAC) 244-250 [BibTex]

  • Jan Malburg and Heinz Riener and Goerschwin Fey (2017). Mining Latency Guarantees for RT-level Designs. Workshop on Design Automation for Understanding Hardware Designs (DUHDe) [BibTex]

  • Meß, Jan-Gerd and Schmidt, Robert and Fey, Goerschwin (2017). Adaptive Compression Schemes for Housekeeping Data. IEEE Aerospace Conference (AEROCONF) [BibTex]

  • Heinz Riener and Rüdiger Ehlers and Goerschwin Fey (2017). CEGAR-Based EF Synthesis of Boolean Functions with an Application to Circuit Rectification. ASP Design Automation Conference (ASPDAC) 251-256 [BibTex]

  • Heinz Riener and Ruediger Ehlers and Goerschwin Fey (2017). Counterexample-Guided EF Synthesis of Boolean Functions. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

  • Heinz Riener and Goerschwin Fey (2017). Computing Exact Fault Candidates Incrementally. Workshop on Design Automation for Understanding Hardware Designs (DUHDe) [BibTex]

  • Heinz Riener and Robert Koenighofer and Goerschwin Fey and Roderick Bloem (2017). SMT-Based CPS Parameter Synthesis. Applied Verification for Continuous and Hybrid Systems (ARCH) 126-133 [BibTex]

  • Robert Schmidt and Alberto Garcia-Ortiz and Goerschwin Fey (2017). Temporal Redundancy Latch-based Architecture for Soft Error Mitigation. IEEE International On-Line Testing Symposium (IOLTS) 240-243 [BibTex]

  • Robert Schmidt and Alberto Garcia-Ortiz and Goerschwin Fey (2017). Temporal Redundancy Latch-based Architecture for Soft Error Mitigation. [BibTex]

  • Niels Thole and Goerschwin Fey (2017). Empirical Evaluation of a Formal Conservative Analysis to Prove Robustness under Variability. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

2016

  • Adam Kostrzewa, Sebastian Tobuschat, Selma Saidi and Rolf Ernst (2016). Supporting Suspension-based Locking Mechanisms for Real-Time Networks-on-chips. In Proceedings of the 24th International Conference on Real-Time Networks and Systems (RTNS) Brest / France 215-224 [Abstract] [BibTex]

  • Adam Kostrzewa, Sebastian Tobuschat, Selma Saidi and Rolf Ernst (2016). Safe and Dynamic Traffic Rate Control for Networks-on-Chips. In Proceedings of the 10th International Symposium on Networks-on-Chip (NOCS) Nara / Japan 1-8 [Abstract] [BibTex]

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