Institute of Embedded Systems

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2014

  • Nicolas Roeser, Arno Luppold and Heiko Falk (2014). Multi-Criteria Optimization of Hard Real-Time Systems. In Proceedings of the 8th Junior Researcher Workshop on Real-Time Computing (JRWRTC) Versailles / France 49-52 [Abstract] [BibTex]

  • Sudipta Chattopadhyay, Lee Kee Chong, Abhik Roychoudhury, Timon Kelter, Peter Marwedel and Heiko Falk (2014). A Unified WCET Analysis Framework for Multicore Platforms. ACM Transactions on Embedded Computing Systems (TECS). 13. (4s), [Abstract] [BibTex]

  • Muhammad Kashif Hanif (2014). Mapping Dynamic Programming Algorithms on Graphics Processing Units. Hamburg / Germany [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2014). Heuristic decoding of linear codes using commutative algebra. Designs, Codes and Cryptography (DCC). 76. (1), 23-35 [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2014). Vector space bases for the homogeneous parts in homogeneous ideals and graded modules over a polynomial ring. International Journal of Pure and Applied Mathematics (IJPAM). 93. (6), 835-844 [Abstract] [BibTex]

  • Timon Kelter, Heiko Falk, Peter Marwedel, Sudipta Chattopadhyay and Abhik Roychoudhury (2014). Static analysis of multi-core TDMA resource arbitration delays. the International Journal of Time-Critical Computing Systems (Real-Time Systems). 50. (2), 185-229 [Abstract] [BibTex]

  • Philip Axer, Rolf Ernst, Heiko Falk, Alain Girault, Daniel Grund, Nan Guan, Bengt Jonsson, Peter Marwedel, Jan Reineke, Christine Rochange, Maurice Sebastian, Reinhard von Hanxleden, Reinhard Wilhelm and Wang Yi (2014). Building Timing Predictable Embedded Systems. ACM Transactions on Embedded Computing Systems (TECS). 13. (4), [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2014). Gröbner bases for perfect binary codes. International Journal of Pure and Applied Mathematics (IJPAM). 91. (2), 155-167 [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2014). Singleton codes. International Journal of Pure and Applied Mathematics (IJPAM). 91. (3), 273-290 [Abstract] [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2014). Debug Automation for Synchronization Bugs at RTL. VLSI Design Conference 44-49 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2014). Transaction-Based Online Debug for NoC-Based Multiprocessor SoCs. Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP) 400-404 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2014). SAT-Based Speedpath Debugging Using Waveforms. IEEE European Test Symposium (ETS) 63-68 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2014). Debug Automatisierung für logische Schaltungen unter Zeitvariation mittels Waveforms. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

  • Stephan Eggersglüß and Goerschwin Fey and Ilia Polian (2014). Test digitaler Schaltkreise. [BibTex]

  • Niels Thole and Goerschwin Fey (2014). Equivalence Checking on System Level using Stepwise Induction. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) 197-200 [BibTex]

2013

  • Svetlana Torgasin and Karl-Heinz Zimmermann (2013). An all-pairs shortest path algorithm for bipartite graphs. Central European Journal of Computer Science (CEJCS). 3. (4), 149-157 [Abstract] [BibTex]

  • Arno Luppold, Benjamin Menhorn, Heiko Falk and Frank Slomka (2013). A New Concept for System-Level Design of Runtime Reconfigurable Real-Time Systems. the ACM SIGBED Review. 10. (4), 57-60 [Abstract] [BibTex]

  • Jan C. Kleinsorge, Heiko Falk and Peter Marwedel (2013). Simple Analysis of Partial Worst-case Execution Paths on General Control Flow Graphs. In Proceedings of the International Conference on Embedded Software (EMSOFT) Montreal / Canada [Abstract] [BibTex]

  • Wolfram Retter (2013). Topics in Abstract Order Geometry. Hamburg / Germany [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2013). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2013). Universal Gröbner bases for linear codes. International Journal of Pure and Applied Mathematics (IJPAM). 86. (2), 345-358 [Abstract] [BibTex]

  • Timon Kelter, Tim Harde, Peter Marwedel and Heiko Falk (2013). Evaluation of resource arbitration methods for multi-core real-time systems. In Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis (WCET) Paris / France 1-10 [Abstract] [BibTex]

  • Arno Luppold, Benjamin Menhorn, Heiko Falk and Frank Slomka (2013). A New Concept for System-Level Design of Runtime Reconfigurable Real-Time Systems. In Proceedings of the 5th Workshop on Adaptive and Reconfigurable Embedded Systems (APRES) Philadelphia / USA [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2013). Computing generating sets for quaternary codes using Gröbner bases. International Journal of Pure and Applied Mathematics (IJPAM). 84. (1), 99-109 [Abstract] [BibTex]

  • Che-Wei Chang, Jian-Jia Chen, Tei-Wei Kuo and Heiko Falk (2013). Real-Time Partitioned Scheduling on Multi-Core Systems with Local and Global Memories. In Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC) Yokohama / Japan 467-472 [Abstract] [BibTex]

  • Rob Aitken and Goerschwin Fey and Zbigniew T. Kalbarczyk and Frank Reichenbach and Matteo Sonza Reorda (2013). Reliability Analysis Reloaded: How Will We Survive?. Design, Automation and Test in Europe (DATE) 358-367 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2013). Debug Automation for Logic Circuits Under Timing Variations. IEEE Design and Test of Computers (DT). 60-69 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2013). Efficient Automated Speedpath Debugging. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 48-53 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2013). Towards Debug Automation for Timing Bugs at RTL. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

  • Mehdi Dehbashi and André Sülflow and Goerschwin Fey (2013). Automated Design Debugging in a Testbench-Based Verification Environment. Microprocessors and Microsystems (MICPRO). 206-217 [BibTex]

  • Goerschwin Fey and Matteo Sonza Reorda (Organizers) (2013). Reliability Analysis Reloaded: How Will We Survive? (Embedded Tutorial). [BibTex]

  • Alexander Finder and Jan-Philipp Witte and Goerschwin Fey (2013). Debugging HDL Designs Based on Functional Equivalences with High-Level Specifications. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 60-65 [BibTex]

  • Daniel Grosse and Goerschwin Fey and Rolf Drechsler (2013). Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis. Electronic Communications of the EASST. 13 pages [BibTex]

  • Jan Malburg and Alexander Finder and Goerschwin Fey (2013). Tuning Dynamic Data Flow Analysis to Support Design Understanding. Design, Automation and Test in Europe (DATE) 1179-1184 [BibTex]

  • Jan Malburg and Alexander Finder and Goerschwin Fey (2013). Analyse dynamischer Abhängigkeitsgraphen zum Debugging von Hardwaredesigns. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf (ZUE) 59-66 [BibTex]

  • Heinz Riener and Goerschwin Fey (2013). Yet a Better Error Explanation Algorithm (Extended Abstract). ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) 193-194 [BibTex]

  • Heinz Riener and Stefan Frehse and Goerschwin Fey (2013). Improving Fault Tolerance Utilizing Hardware-Software-Co-Synthesis. Design, Automation and Test in Europe (DATE) 939-942 [BibTex]

  • Lukáŝ Sekanina and Görschwin Fey and Jaan Raik and Snorre Aunet and Richard Ruzicka (editors) (2013). 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013. [BibTex]

2012

  • Muhammad Kashif Hanif and Karl-Heinz Zimmermann (2012). Graphics card processing: accelerating profile-profile alignment. Central European Journal of Computer Science (CEJCS). 2. (4), 367-388 [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2012). A variant of the Gröbner basis algorithm for computing Hilbert bases. International Journal of Pure and Applied Mathematics (IJPAM). 81. (1), 145-155 [Abstract] [BibTex]

  • Mehwish Saleemi (2012). Coding Theory via Groebner Bases. Hamburg / Germany [Abstract] [BibTex]

  • Natalia Dück and Karl-Heinz Zimmermann (2012). Standard bases for linear codes. International Journal of Pure and Applied Mathematics (IJPAM). 80. (3), 315-329 [Abstract] [BibTex]

  • Heiko Falk (2012). Reconciling Compilation and Timing Analysis. Tampere / Finland [BibTex]

  • Heiko Falk, Kevin Hammond, Kim G. Larsen, Björn Lisper and Stefan M. Petters (2012). Code-Level Timing Analysis of Embedded Software. In Proceedings of the International Conference on Embedded Software (EMSOFT) Tampere / Finland 163-164 [Abstract] [BibTex]

  • Che-Wei Chang, Jian-Jia Chen, Waqaas Munawar, Tei-Wei Kuo and Heiko Falk (2012). Partitioned Scheduling for Real-Time Tasks on Multiprocessor Embedded Systems with Programmable Shared SRAMs. In Proceedings of the International Conference on Embedded Software (EMSOFT) Tampere / Finland 153-162 [Abstract] [BibTex]

  • Oscar Mauricio Reyes Torres (2012). Neural Synchronization and Light-weight Cryptography in Embedded Systems. Shaker: Hamburg / Germany [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2012). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Philip Axer, Rolf Ernst, Heiko Falk, Alain Girault, Daniel Grund, Nan Guan, Bengt Jonsson, Peter Marwedel, Jan Reineke, Christine Rochange, Maurice Sebastian, Reinhard von Hanxleden, Reinhard Wilhelm and Wang Yi (2012). Building Timing Predictable Embedded Systems. Uppsala / Sweden [Abstract] [BibTex]

  • Heiko Falk and Peter Marwedel (Eds.) (2012). Introduction to the Special Section on SCOPES'09. ACM Transactions on Embedded Computing Systems (TECS). 11S. (1), 17:1-17:3 [BibTex]

  • Heiko Falk and Wang Yi (Eds.) (2012). Proceedings of the 13th International Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES). Beijing / China [www] [BibTex]

  • Sudipta Chattopadhyay, Lee Kee Chong, Abhik Roychoudhury, Timon Kelter, Heiko Falk and Peter Marwedel (2012). A Unified WCET Analysis Framework for Multi-core Platforms. In Proceedings of the 18th Real-Time and Embedded Technology and Applications Symposium (RTAS) Beijing / China 99-108 [Abstract] [BibTex]

  • Sascha Plazar, Heiko Falk, Jan C. Kleinsorge and Peter Marwedel (2012). WCET-aware Static Locking of Instruction Caches. In Proceedings of the International Symposium on Code Generation and Optimization (CGO) San Jose / USA 44-52 [Abstract] [BibTex]

  • Heiko Falk and Jan C. Kleinsorge (2012). Reconciling Compilers and Timing Analysis for Safety-Critical Real-Time Systems - the WCET-aware C Compiler WCC. San Jose / USA [BibTex]

  • Heiko Falk, Peter Marwedel and Paul Lokuciejewski (2012). Reconciling Compilation and Timing Analysis. Springer: [Abstract] [BibTex]

  • Wolfgang Kramper, Ralf Wanker and Karl-Heinz Zimmermann (2012). Analysis of swarm behavior using compound eye and neural network control. Central European Journal of Computer Science (CEJCS). 2. (1), 16-32 [Abstract] [BibTex]

  • Svetlana Torgasin (2012). Graph-based Methods for the Design of DNA Computations. Hamburg / Germany [Abstract] [BibTex]

  • Roderick Bloem and Rolf Drechsler and Goerschwin Fey and Alexander Finder and Georg Hofferek and Robert Könighofer and Jaan Raik and Urmas Repinski and André Sülflow (2012). FoREnSiC - An Automatic Debugging Environment for C Programs. IBM Haifa Verification Conference (HVC) 260-265 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2012). Automated Debugging from Pre-Silicon to Post-Silicon. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 324-329 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2012). Automated Post-Silicon Debugging of Failing Speedpaths. Asian Test Symposium (ATS) 13-18 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2012). Application of Timing Variation Modeling to Speedpath Diagnosis. System, Software, SoC and Silcon Debug Conference (S4D) 34-37 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2012). Automated Debugging from Pre-Silicon to Post-Silicon. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey and Kaushik Roy and Anand Raghunathan (2012). Functional Analysis of Circuits Under Timing Variations. IEEE European Test Symposium (ETS) 177 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey and Kaushik Roy and Anand Raghunathan (2012). Functional Analysis of Circuits Under Timing Variations. edaWorkshop 45-50 [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey and Kaushik Roy and Anand Raghunathan (2012). On Modeling and Evaluation of Logic Circuits Under Timing Variations. EUROMICRO Symposium on Digital System Design (DSD) 431-436 [BibTex]

  • Finder, Alexander and Fey, Görschwin (2012). Evaluating Debugging Algorithms from a Qualitative Perspective. System Specification and Design Languages - Selected Contributions from FDL 2010 21-36 [BibTex]

  • Stefan Frehse and Goerschwin Fey and Eli Arbel and Karen Yorav and Rolf Drechsler (2012). Complete and Effective Robustness Checking by Means of Interpolation. Formal Methods in Computer-Aided Design (FMCAD) 82-90 [BibTex]

  • Goerschwin Fey and Masahiro Fujita and Natasha Miskov-Zivanov and Kaushik Roy and Matteo Sonza Reorda (editors) (2012). Verifying Reliability (Dagstuhl Seminar 12341). Dagstuhl Reports. 57-73 [BibTex]

  • Goerschwin Fey and Masahiro Fujita and Natasha Miskov-Zivanov and Kaushik Roy and Matteo Sonza Reorda (Organizers) (2012). Verifying Reliability (Dagstuhl Seminar 12341). Dagstuhl Reports. [BibTex]

  • Stefan Frehse and Heinz Riener and Goerschwin Fey (2012). Hardware-Software-Co-Synthese zur Verbesserung der Fehlertoleranz. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf (ZUE) 90-96 [BibTex]

  • Goerschwin Fey (2012). Assessing System Vulnerability using Formal Verification Techniques. Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS) - Revised Selected Papers 47-56 [BibTex]

  • Jan Malburg and Alexander Finder and Goerschwin Fey (2012). Automated Feature Localization for Hardware Designs using Coverage Metrics. Design Automation Conference (DAC) 941-946 [BibTex]

  • Jan Malburg and Alexander Finder and Goerschwin Fey (2012). Automated Feature Localization for Hardware Designs using Coverage Metrics. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

  • Heinz Riener and Goerschwin Fey (2012). Model-Based Diagnosis versus Error Explanation. ACM/IEEE Int'l Conference on Formal Methods and Models for Codesign (MEMOCODE) 43-52 [BibTex]

  • Heinz Riener and Goerschwin Fey (2012). FAUST: A Framework for Formal Verification, Automated Debugging, and Software Test Generation. International SPIN Workshop on Model Checking of Software (SPIN) 234-240 [BibTex]

  • Heinz Riener and Goerschwin Fey (2012). Model-Based Diagnosis versus Error Explanation. International Workshop on System Level-Design of Automotive Electronics/Software (SLDAES) [BibTex]

  • Jaan Raik (Organizer) (2012). Panel: Can RTL test techniques be applied to software?. [BibTex]

  • Mathias Soeken and Heinz Riener and Robert Wille and Goerschwin Fey and Rolf Drechsler (2012). Verification of Embedded Systems Using Modeling and Implementation Languages. International Workshop on Metamodelling and Code Generation for Embedded Systems (MeCoEs) 67-72 [BibTex]

2011

  • Mehwish Saleemi and Karl-Heinz Zimmermann (2011). Groebner bases for linear codes over GF(4). International Journal of Pure and Applied Mathematics (IJPAM). 73. (4), 435-442 [Abstract] [BibTex]

  • Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel and Lothar Thiele (2011). Approximating Pareto optimal compiler optimization sequences-a trade-off between WCET, ACET and code size. Software: Practice and Experience. 41. (12), 1437-1458 [Abstract] [BibTex]

  • Jan C. Kleinsorge, Heiko Falk and Peter Marwedel (2011). A Synergetic Approach to Accurate Analysis of Cache-Related Preemption Delay. In Proceedings of the International Conference on Embedded Software (EMSOFT) Taipei / Taiwan 329-338 [Abstract] [BibTex]

  • Sascha Plazar, Jan C. Kleinsorge, Heiko Falk and Peter Marwedel (2011). WCET-driven Branch Prediction aware Code Positioning. In Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) Taipei / Taiwan 165-174 [Abstract] [BibTex]

  • Heiko Falk and Helena Kotthaus (2011). WCET-driven Cache-aware Code Positioning. In Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES) Taipei / Taiwan 145-154 [Abstract] [BibTex]

  • Samarjit Chakraborty, Marco Di Natale, Heiko Falk, Martin Lukasiewyzc and Frank Slomka (2011). Timing and Schedulability Analysis for Distributed Automotive Control Applications. Taipei / Taiwan [Abstract] [BibTex]

  • Robert Leppert, Mehwish Saleemi and Karl-Heinz Zimmermann (2011). Groebner bases for quaternary codes. International Journal of Pure and Applied Mathematics (IJPAM). 71. (4), 595-608 [Abstract] [BibTex]

  • Karl-Heinz Zimmermann (2011). Computability Theory. Hamburg University of Technology: [Abstract] [BibTex]

  • Heiko Falk, Norman Schmitz and Florian Schmoll (2011). WCET-aware Register Allocation based on Integer-Linear Programming. In Proceedings of the 23rd Euromicro Conference on Real-Time Systems (ECRTS) Porto / Portugal 13-22 [Abstract] [BibTex]

  • Timon Kelter, Heiko Falk, Peter Marwedel, Sudipta Chattopadhyay and Abhik Roychoudhury (2011). Bus-Aware Multicore WCET Analysis through TDMA Offset Bounds. In Proceedings of the 23rd Euromicro Conference on Real-Time Systems (ECRTS) Porto / Portugal 3-12 [Abstract] [BibTex]

  • Mehdi Dehbashi and Goerschwin Fey (2011). Automated Post-Silicon Debugging of Design Bugs. System, Software, SoC and Silcon Debug Conference (S4D) 67-71 [BibTex]

  • Mehdi Dehbashi and André Sülflow and Goerschwin Fey (2011). Automated Design Debugging in a Testbench-Based Verification Environment. EUROMICRO Symposium on Digital System Design (DSD) 479-486 [BibTex]

  • Stefan Frehse and Finn Haedicke and Melanie Diepenbeck and Goerschwin Fey and Rolf Drechsler (2011). Hochoptimierter Ablauf zur Robustheitsprüfung. GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf (ZUE) 35-42 [BibTex]

  • Alexander Finder and André Sülflow and Goerschwin Fey (2011). Latency Analysis for Sequential Circuits. IEEE European Test Symposium (ETS) 129-134 [BibTex]

  • Alexander Finder and André Sülflow and Goerschwin Fey (2011). Latency Analysis for Sequential Circuits. GI/GMM/ITG-Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TUZ) 119-124 [BibTex]

  • Goerschwin Fey and André Sülflow and Stefan Frehse and Rolf Drechsler (2011). Effective Robustness Analysis using Bounded Model Checking Techniques. IEEE Transactions on Computer Aided Design of Circuits and Systems (TCAD). 1239-1252 [BibTex]

  • Goerschwin Fey (2011). Orchestrated Multi-Level Information Flow Analysis to Understand SoCs. Design Automation Conference (DAC) 284-285 [BibTex]

  • Goerschwin Fey (2011). Assessing System Vulnerability using Formal Verification Techniques. Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS) [BibTex]

  • Daniel Große and Goerschwin Fey and Rolf Drechsler (2011). Enhanced Formal Verification Flow for Circuits Integrating Debugging. Design and Test Technology for Dependable Systems-on-Chip 119-129 [BibTex]

  • Finn Haedicke and Stefan Frehse and Goerschwin Fey and Daniel Große and Rolf Drechsler (2011). metaSMT: Focus on Your Application not on Solver Integration. Int'l Workshop on Design and Implementation of Formal Tools and Systems (DIFTS) 22-29 [BibTex]

  • Heinz Riener and Roderick Bloem and Goerschwin Fey (2011). Test Case Generation from Mutants using Model Checking Techniques. Mutation 388-397 [BibTex]

  • Mathias Soeken and Ulrich Kühne and Martin Freibothe and Goerschwin Fey and Rolf Drechsler (2011). Towards Automatic Property Generation for the Formal Verification of Bus Bridges. IEEE Int'l Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 417-422 [BibTex]

  • Mathias Soeken and Ulrich Kühne and Martin Freibothe and Goerschwin Fey and Rolf Drechsler (2011). Towards Automatic Property Generation for the Formal Verification of Bus Bridges. ITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) [BibTex]

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