Publications on WCET-Aware Compilation
|Title: Memory-Aware Optimization of Embedded Software for Multiple Objectives. <em>Handbook of Hardware/Software Codesign</em>|
|Written by: Peter Marwedel, Heiko Falk, and Olaf Neugebauer|
|in: June (2017).|
|Editor: In S. Ha and J. Teich (Eds.)|
|how published: 17-85 MFN17 Springer|
Note: hfalk, ESD, multiopt, WCC
Abstract: Information processing in Cyber-Physical Systems (CPSs) has to respect a variety of constraints and objectives such as response and execution time, energy consumption, Quality of Service (QoS), size and cost. Due to the large impact of the size of memories on their energy consumption and access times, an exploitation of memory characteristics offers a large potential for optimizations. In this chapter, we will describe optimization approaches proposed by our research groups. We will start with optimizations for single objectives, such as energy consumption and execution time. As a consequence of considering hard real-time systems, special attention is on the minimization of the Worst-Case Execution Time (WCET) within compilers. Three WCET reduction techniques are analyzed: exploitation of scratchpads, instruction cache locking, and cache partitioning for multi-task systems. The last section presents an approach for considering trade-offs between multiple objectives in the design of a cyber-physical sensor system for the detection of bio-viruses.