The WCET-Aware C Compiler WCC

The WCET-aware C Compiler WCC is an ANSI-C compiler for Infineon TriCore and ARM-based microcontrollers. Currently, WCC supports the Infineon TriCore TC1796 and TC1797 microcontrollers which are heavily employed in the automotive industry and ARM7 architectures.

The overall structure of our WCET-aware C Compiler WCC is depicted in the above figure. Those stages of the compiler connected with black arrows resemble a typical optimizing compiler:

  • Parser
    The parser is fully compliant with the ANSI C99 and ISO/IEC 9899:1999(E) standard for the programming language C. It accepts several C source code files within a single compiler run and creates a high-level intermediate representation called ICD-C out of them.
  • ICD-C
    The ICD-C compiler framework is designed as a compiler front-end providing a machine-independent intermediate representation (IR) for C code. It bases on target architecture-independent code analyses and built-in optimizations. ICD-C can be used stand-alone complementing existing compiler tool chains by applying optimizations and finally emitting compilable C code, thus allowing source-to-source optimization. The WCC compiler makes use of the integrated code selector interface of ICD-C allowing to couple it with a dedicated code selector for an actual target processor.
  • Code Selector
    The code selector is responsible for the translation of the source-level IR ICD-C to assembly code for the Infineon TriCore processor. It uses ICD-C's inherent capabilities allowing to attach tree-pattern matching based code selectors. The tree grammar for the TriCore architecture within WCC is highly sophisticated. It contains more than 25,000 lines of C++ code leading to the emission of highly efficient machine code by WCC.
    The ICD-LLIR framework is intended to represent assembly code within the various stages of a compiler back-end. ICD-LLIR is a retargetable low-level intermediate representation. It includes various standard assembly-level analyses and optimizations without the need to retarget them for each and every processor to be supported by ICD-LLIR. Retargeting ICD-LLIR for a given target processor is quite easy. The ICD-LLIR description of the TriCore processor architecture within WCC consists of only 11,000 lines of C++ code which is not a lot, considering the complexity of the TriCore machines.
  • Code Generator
    The code generator is finally responsible for the emission of valid assembly code out of the class structures of the TriCore and ARM ICD-LLIR within WCC's back-end.

Those components of WCC turning it into a unique WCET-aware compiler are connected with the standard compiler components described previously using green arrows in the above figure. Since these modules represent the distinctive features of WCC, they are described in more detail on the pages accessible via the side menu on the left.