Timing Analysis on Code-Level (TACLe)

Fact Sheet

AcronymTACLe
NameTiming Analysis on Code-Level
Homepagewww.tacle.eu
Role of TUHHAction Vice Chair, member of Working Groups 1, 2 and 4
Start Date07/11/2012
End Date06/11/2016
Funds DonorCOST Office Brussels

Summary

TACLe is a four years lasting COST Action funded by the COST Office in Brussels.

Many embedded systems are safety-critical real-time systems that must process data within given deadlines. To validate real-time properties, timing analyses of program code are mandatory. Research on techniques for timing analysis of software touches many areas within computer science, e.g., computer architecture, compiler construction and formal verification.

This COST Action aims to cross-link the leading European researchers in these areas and thus to strengthen Europe's leading position in the field of timing analysis. TACLe's research activities include timing models for multicore systems, support of timing analysis by software development tools, early-stage timing analysis right in the beginning of the software development cycle, and the consideration of resources other than time like, e.g., energy dissipation.

TACLe Publications of the Embedded Systems Design Group

[176905]
Title: Evaluation of resource arbitration methods for multi-core real-time systems. <em>In Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis (WCET)</em>
Written by: Timon Kelter, Tim Harde, Peter Marwedel and Heiko Falk
in: July (2013).
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on pages: 1-10
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Series: 20130709-wcet-kelter.pdf
Address: Paris / France
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ISBN: 10.4230/OASIcs.WCET.2013.1
how published: 13-70 KHMF13 WCET
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Note: hfalk, ESD, emp2, tacle, WCC

Abstract: Multi-core systems have become prevalent in the last years, because of their favorable properties in terms of energy consumption, computing power and design complexity. First attempts have been made to devise WCET analyses for multi-core processors, which have to deal with the problem that the cores may experience interferences during accesses to shared resources. To limit these interferences, the vast amount of previous work is proposing a strict TDMA (time division multiple access) schedule for arbitrating shared resources. Though this type of arbitration yields a high predictability, this advantage is paid for with a poor resource utilization. In this work, we compare different arbitration methods with respect to their predictability and average case performance. We show how known WCET analysis techniques can be extended to work with the presented arbitration strategies and perform an evaluation of the resulting ACETs and WCETs on an extensive set of realworld benchmarks. Results show that there are cases when TDMA is not the best strategy, especially when predictability and performance are equally important.