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Timing Analysis on Code-Level (TACLe)
Fact Sheet
Acronym | TACLe |
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Name | Timing Analysis on Code-Level |
Homepage | www.tacle.eu |
Role of TUHH | Action Vice Chair, member of Working Groups 1, 2 and 4 |
Start Date | 07/11/2012 |
End Date | 06/11/2016 |
Funds Donor | COST Office Brussels |
Summary
TACLe is a four years lasting COST Action funded by the COST Office in Brussels.
Many embedded systems are safety-critical real-time systems that must process data within given deadlines. To validate real-time properties, timing analyses of program code are mandatory. Research on techniques for timing analysis of software touches many areas within computer science, e.g., computer architecture, compiler construction and formal verification.
This COST Action aims to cross-link the leading European researchers in these areas and thus to strengthen Europe's leading position in the field of timing analysis. TACLe's research activities include timing models for multicore systems, support of timing analysis by software development tools, early-stage timing analysis right in the beginning of the software development cycle, and the consideration of resources other than time like, e.g., energy dissipation.
TACLe Publications of the Embedded Systems Design Group
[176870] |
Title: FPGAs for Software Programmers. |
Written by: Dirk Koch, Frank Hannig and Daniel Ziener |
in: June (2016). |
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ISBN: 10.1007/978-3-319-26408-0 |
how published: 16-60 KHZ16 Springer |
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Note: dziener, ESD
Abstract: This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer’s point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays.<br /> Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples;<br /> Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs;<br /> Explains the reasons for the energy efficiency and performance benefits of FPGA processing;<br /> Provides a user-oriented approach and a sense for where and how to apply FPGA technology.