Generation and Optimization of Real-Time Code for Embedded Multiprocess and Multiprocessor Systems (E = Mp2)

Fact Sheet

AcronymE = Mp2
NameGeneration and Optimization of Real-Time Code for Embedded Multiprocess and Multiprocessor Systems
(in German: Generierung und Optimierung von Echtzeitfähigem Code für Eingebettete Multiprozess- und Multiprozessor-Systeme)
Role of TUHHApplicant
Start Date01/02/2012
End Date30/09/2017
Funds DonorDeutsche Forschungsgemeinschaft (DFG)


During the design of safety-critical real-time systems like, e.g., airbag or flight attitude controllers, their behavior is specified at a high abstraction level. Compilers are an indispensible tool on the way from such a model-based specification to an actual implementation. For singlecore and singleprocess systems, compilers have recently been extended to support real-time properties already during compilation. For multiprocess and multiprocessor systems, compilers currently lack such a support despite of the increasing relevance of such parallel systems.

E = Mp2 aims to provide a software development environment for multiprocess and multiprocessor systems which produces efficient and optimized program code that provably meets real-time constraints. For this purpose, it has to be clarified how compiler and scheduler of an operating system need to cooperate. In addition, novel timing models supporting response times of processes and schedulability of entire systems need to be developed. Based on these timing models, novel compiler optimizations targeting on worst-case timing aspects and schedulability are designed.

In multiprocess systems, tasks can preempt each other and thus interfere. E = Mp2 develops compiler optimizations considering such context switches and scheduling strategies. In multiprocessor systems, different cores can access shared resources (e.g., buses or memories) at the same time and thus can cause additional interference. Therefore, this project works on compiler optimizations minimizing the worst-case timing of such systems by considering accesses to shared resources.

E = Mp2 Publications of the Embedded Systems Design Group

Title: Evaluation of resource arbitration methods for multi-core real-time systems. <em>In Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis (WCET)</em>
Written by: Timon Kelter, Tim Harde, Peter Marwedel and Heiko Falk
in: July (2013).
Volume: Number:
on pages: 1-10
Series: 20130709-wcet-kelter.pdf
Address: Paris / France
ISBN: 10.4230/OASIcs.WCET.2013.1
how published: 13-70 KHMF13 WCET

Note: hfalk, ESD, emp2, tacle, WCC

Abstract: Multi-core systems have become prevalent in the last years, because of their favorable properties in terms of energy consumption, computing power and design complexity. First attempts have been made to devise WCET analyses for multi-core processors, which have to deal with the problem that the cores may experience interferences during accesses to shared resources. To limit these interferences, the vast amount of previous work is proposing a strict TDMA (time division multiple access) schedule for arbitrating shared resources. Though this type of arbitration yields a high predictability, this advantage is paid for with a poor resource utilization. In this work, we compare different arbitration methods with respect to their predictability and average case performance. We show how known WCET analysis techniques can be extended to work with the presented arbitration strategies and perform an evaluation of the resulting ACETs and WCETs on an extensive set of realworld benchmarks. Results show that there are cases when TDMA is not the best strategy, especially when predictability and performance are equally important.