We are using complex workflows to model semiconductor fabrication process, typically on feature scale, and subsequently explore device behavior on transistor-level up to circuit level simulations.
Process models include:
- Ion implantation
- Dopant diffusion and activation
- Oxidation
- Deposition
- Etching
Device simulations can include:
- Self-heating effects
- Circuit co-simulation
- Degradation effects 
In order to investigate the generation of atomic defects and their impact on device behavior and reliability, atomic-scale modelling capabilities are being developed in included in our modelling workflow.