Timing Analysis on Code-Level (TACLe)
|Name||Timing Analysis on Code-Level|
|Role of TUHH||Action Vice Chair, member of Working Groups 1, 2 and 4|
|Funds Donor||COST Office Brussels|
TACLe is a four years lasting COST Action funded by the COST Office in Brussels.
Many embedded systems are safety-critical real-time systems that must process data within given deadlines. To validate real-time properties, timing analyses of program code are mandatory. Research on techniques for timing analysis of software touches many areas within computer science, e.g., computer architecture, compiler construction and formal verification.
This COST Action aims to cross-link the leading European researchers in these areas and thus to strengthen Europe's leading position in the field of timing analysis. TACLe's research activities include timing models for multicore systems, support of timing analysis by software development tools, early-stage timing analysis right in the beginning of the software development cycle, and the consideration of resources other than time like, e.g., energy dissipation.
TACLe Publications of the Embedded Systems Design Group
|Title: Schedulability-Oriented WCET-Optimization of Hard Real-Time Multitasking Systems. <em>In Proceedings of the 8th Junior Researcher Workshop on Real-Time Computing (JRWRTC)</em>|
|Written by: Arno Luppold and Heiko Falk|
|in: October (2014).|
|on pages: 9-12|
|Address: Versailles / France|
|how published: 14-10 LuFa14 JRWRTC|
Note: aluppold, hfalk, ESD, emp2, tacle, WCC
Abstract: In multitasking hard real-time systems, each task's response time must provably be lower than or equal to its deadline. If the system does not hold all timing constraints, WCET-oriented optimizing compilers can be used to improve each task's worst-case runtime behaviour. However, current optimizations do not account for a system's schedulability constraints. We provide an approach based on Integer-Linear Programming (ILP) for schedulability-oriented WCET optimization of hard real-time systems.