Co-Integration of Microelectronics and Photonics

Photonics with its advantages in high bandwidth, low power consumption, high parallelizability, low latency and high signal integrity is considered as a natural follower of microelectronics in information and communication technology (ICT). However, microelectronics is a mature and pervasive technology and its ubiquity should be beneficially combined in a co-integrated photonics/microelectronics platform. Creating added-value by making photonic circuits electronically controllable and enhancing the performance of electronic systems by photonic devices is the target of the HELIOS initiative. Innovative application areas in medical engineering and sensor technology, as well as optical signal processing and perspectives in computing will be addressed. Going beyond the classical telecommunication domain will allow HELIOS to create a unique profile in interdisciplinary collaboration with partners from medicine, sensor technology and computer science.

The research agenda of I3-HELIOS

The various facets and the broad coverage in the development of co-integrated optoelectronic systems of the HELIOS initiative can only be tackled with an interdisciplinary team with expertise in fabrication and integration technology, photonic devices and materials, microelectronics and opto-electronics with ASICs and SiP approach, as well as modelling and test. In a sequential approach all four groups first have to pave ground for the sustainable research agenda, i.e. creating the research infrastructure, developing key photonic and optoelectronic components and elaborating new methodology for modelling and test. In the next stage, synergies in the fabrication and device domain (MST and OEM) as well as in the design and modelling and test domain (IIC and TET) will be exploited for a full establishment of all domains in a complete development flow - as will be soon displayed under follow-up Project A and B. The current research work and progress is detailed in the following.

Establishing the research infrastructure for HELIOS

For the creation of the research infrastructure labs from various groups have to be reorganized for the new machine complexes and networked in order to support an effective development flow. IIC has extensively renovated and converted its laboratory rooms in the last 1.5 years. For the first time a dedicated room is now available for the micro-assembly of electronic and optoelectronic systems at TUHH. A separated room with reduced contamination for the realization of higher quality systems is provided. Similarly, a chemical-technical work area has been created for basic biotechnological test setups. The new micro-assembly lab hosts now a digital inspection microscope, a fine placer, a ball and wedge wirebonder and a high-end 3D silicone printer for packaging. The setup and commissioning of a first optoelectronic function demonstrator could be successfully performed. TET is setting up a component and interconnects characterization lab with extra funding from the deanary. A near field scanner will be purchased which is essential for the research of the bidirectional optoelectronic neuro implant which will be considered as a test case for HELIOS in the medical application field. MST has reorganized its 650m2 semiconductor and microsystems technology facility since beginning of 2019 in order to host six of the machine complexes. Furthermore, the photonic lab has been modernized and doubled in size. One of the key equipment is a femtosecond laser 3D patterning machine with micron precision using selective laser-induced etching and with submicron precision using 2 photon polymerization. The machine enables also laser welding and local refractive index modification for the fabrication of photonic waveguides. A new PECVD with enhanced performance will enable a more professional deposition of amorphous silicon with trimmable characteristics which constitutes one of our key silicon photonics technologies. An Atomic Layer Etching machine in combination with DRIE will allow to minimize fabrication variations in the photonic structures which is crucial for the performance of photonic circuits. A customized setup for semi-automated trimming of photonic circuits will be purchased in 2021. Together with the well-equipped material and photonic characterization facility at OEM the complementary expertise from TUHH can now be effectively networked for the co-integration of microelectronics and silicon photonics. Combining the microelectronics and silicon photonics facility at TUHH with the GaAs platform and electron beam lithography at CHyN complete the fabrication flow for the co-integration. MST and CHyN are implementing a HELIOS shared lab process flow as shown in figure 1. First fabrication trials were already conducted. Several devices such as waveguides, grating couplers, microring and racetrack resonators, crosses, direct couplers and Mach-Zehnder interferometers were structured in the amorphous silicon layer on both the silicon and glass substrates. Initial findings suggest that the well-known ring and racetrack filtering functions could be observed and both front and back side coupling into the photonics layer is possible for the glass substrate. At this moment we are working on improvements in the EBL runs for the wide range of photonic structure sizes.

Generating a technology basis for a sustainable research agenda

In order to generate a technology basis for a sustainable research agenda I3-HELIOS addresses the complete development flow covering all facets from design and modelling, fabrication, system integration, packaging and test with direct link to innovative application fields of medical engineering, sensor technology, and optical signal processing and computing.

MST focuses on the design and fabrication of photonic devices and systems with electronic control for a wide range of applications, including but not limited to signal processing and biosensing. A key ingredient among the three envisioned research directions is the flexible use of deposited silicon materials, e.g. amorphous silicon. This waveguiding material is back-end-of-line compatible with CMOS fabrication, can be easily deposited and structured at low temperatures as well as trimmed to account for fabrication non-uniformities, and efficiently controlled thermo-optically [1-7].

The first research topic addresses optical signal processing, where the platform of amorphous silicon deposited on a thermally grown silicon dioxide layer using plasma enhanced chemical vapor deposition (PECVD) is further developed. MST previously reported on the design and fabrication of waveguides, direct couplers, grating couplers and micro ring and racetrack resonators [3,4] which are essential building blocks for the optical add/drop multiplexers (OADMs) and photonic routers [1,3,5]. MST demonstrated that such systems could be fabricated with reasonable accuracy and reproducibility [4,6] and that the fabrication-induced non-uniformities could be corrected using trimming [1,3,5] proving amorphous silicon as an appropriate technology platform for silicon photonics. MST is cooperating with equipment manufacturer to create a set-up making the trimming process more time-efficient and reproducible. Microring resonators have been designed for the test of the enhanced and optimized trimming process. Based on these works the use of trimming will improve the developed OADMs and routers showing that more (input and output) channels can be added by employing the trimming approach. Finally, heater-controllable switch fabrics could be fabricated in the described platform. In this regard, MST is working on implementing machine learning concepts. The design process of such a complicated network of many photonic components could be simplified and sped up by using machine learning algorithms.

The second research topic employs glass substrates on which amorphous silicon is deposited and structured. The use of (quartz) glass as substrate and a thin silicon dioxide layer as cladding results in a totally transparent platform, where light can be coupled into and out of the photonics layer from both the front and back side of the chip. Especially for chip-integrated biosensors this extended wavelength range covering visible to near-infrared and novel integration concepts for light source and detector are expected to find fruitful applications, for example, two separate media could be analyzed and compared simultaneously, without the need to reroute the fluids to a single side of the chip.

The third research topic is the use of novel material combinations for electro-optic applications. More specifically, MST aims to strip-load a lithium niobate substrate with amorphous silicon. Our experience in the design and fabrication of amorphous silicon photonics can then be combined with the electro-optic capabilities of the lithium niobate substrate. The lithium niobate substrate enables tuning of the effective index with an electric field, hence allowing direct electronic control of the photonic devices, while amorphous silicon is suitable for straight-forward and accurate fabrication [1,3] of ribs on top of the lithium niobate substrate, where remaining fabrication non-uniformities can be substantially reduced by trimming.

OEM aims to provide optical platforms and applications, which are a key component of the co-integration. These platforms need to be CMOS compatible in order to integrate them further with other microelectronic systems. Hence, the research at OEM in the scope of the I3-Lab focuses on silicon photonics to make this integration possible. Three different platforms, which are researched at OEM, are candidates for further integration. First, 2D integrating cells, which allow ultra-long optical path length on a small footprint, are under investigation [8]. These integrating cells can be used for multitude of applications, such as gas sensing systems or free-carrier detection for fundamental material research [9]. Secondly optical off-chip couplers are essential to integrate external sources and detectors with on-chip optical components. At OEM couplers for transverse magnetic modes and for multiple modes are investigated [10,11]. Lastly a practical implementation of an all-silicon integrated optical isolator is proposed and tested. Optical isolators are fundamental components of optical communication systems and a practical implementation is still lacking [12].

For many applications, such as sensing systems, long optical path lengths are desirable. Optical waveguides, which are the most fundamental building block of integrated optical circuits, are well researched. However, achieving long optical path lengths on a small area on chip requires small bending radii, which introduces losses. The 2D integrating cell introduced by OEM implements the principle of a 3D integrating sphere on the SOI platform. Photonic crystal (PhC) mirrors are used to restrict the light within an area on chip and long path lengths are achieved by multiple reflections. OEM first reported a reflectivity of these tailored PhC mirrors of 99.1 %, which allows an optical path length of approx. 10 cm within an area of less than 1 mm2 [8]. This platform was used to research the free-carrier lifetime in an unstructured silicon slab via absorption measurements [9]. In this case free carriers excited by visible light incident at normal direction to the chip cause a very weak absorption of infrared radiation propagating in the slab. Due to the long optical path this absorption still could be measured and was used to calculate free carrier concentration and life time. Subsequent investigations were done to further improve the reflectivity of the PhC mirrors. The main loss mechanism of the proposed PhC mirrors is vertical scattering due to a mismatch between the slab mode and the PhC mode. Adiabatic tapers typically reduce these losses, but in case of a PhC even a gradual change of parameters can introduce an intermediate mode that is not completely guided. Simulations of optimized PhC tapers, which avoid such leaky modes, show an increased reflectivity of up to 99.9 %, which would allow 1000 reflections and increase the optical path length to over 1 m for the same footprint. These improved integrating cells are in the process of being manufactured and measured. Figure 2 shows first SEM images of the previous and optimized adiabatic PhC tapers.

Grating couplers are a fundamental building block of integrated optics as they allow light to be coupled to on-chip components from free-space or sources placed directly on top of the optical components. OEM has presented a focusing grating coupler design that allows coupling from a fiber into a mode of the strip waveguide. The unwanted back reflections were minimized by introducing a modified input slot into the grating that fulfills an anti-reflection condition. The concept applies for both TE and TM polarization. Guided TM polarized light shows a larger mode overlap with the cladding material, which is usually unwanted in optical communications, but beneficial for other optical applications such as gas sensing systems. The experimentally realized focusing grating coupler for TM-modes on the silicon photonics platform has a coupling loss of (3.95 ± 0.15) dB at a wavelength of 1.55 µm. [10]

In the frame of the I3-lab project also multimode grating couplers were considered, that should allow the coupling of spatially incoherent sources, like LEDs or thermal emitters, into the chip and outcoupling the power of multiple modes into detectors. The coupling between single mode waveguides and single mode fibers is well-established. In contrast, the coupling between multimode waveguides is more complex and a much less understood topic. OEM has derived theoretical limitations for such coupling and has presented a design for a grating coupler which couples directly into multiple modes of the 2D slab waveguide within a 2D integrating cell [11].

Integrated magneto optical components are needed for on chip optical isolators and circulators. Known magneto-optical materials like Ce:YIG are difficult to integrate into CMOS technology. At the same time silicon is also weakly magneto-optical and shows Faraday effect of 15°/T/m. In order to achieve a required optical rotation a relatively long propagation length of several centimeters is required. Although a folded silicon waveguide can easily achieve required lengths in a compact area, the Faraday rotation will be compensated in the counter propagating waveguide sections. OEM has proposed to introduce birefringence into the waveguide bends. Such birefringence can phase shift the vertical and horizontal polarization with respect to each other by 180° and counter propagating waveguide sections will then accumulate Faraday rotation. The approach was patented [12] and first experimental results showed additional suppression of more than 15 dB for back-propagating waves.

IIC addresses the synergetic combination of microoptics and microelectronics on ASIC and SiP level. The test case is Brain Machine Interfaces (BMIs) which will gain enormous importance for the future of medicine. IIC has many years of experience in the field of electrical neuroprobes and has made a lasting mark on the current state of the art with implantable active microsystems [13,14]. Within the framework of HELIOS, this experience is transferred to the optical domain to pave the way for the next generation of implants. Available BMIs are mostly based on the evaluation of electrical signals. Due to the spatially imprecise electrical interaction via microelectrodes, there is a growing interest in the study of optogenetics in connection with BMIs to manipulate specific neurons via light-sensitive opsins. Thus, integrated optoelectronic transceivers open up new fields of application in the fields of neuronal sensor technology, neurostimulation and in tool making for optophysiology.

For the realization of optogenetic implants, highly sensitive photodiodes are required to record light signals of lowest intensity. Previous problems of weight and size shall be solved by combining sensors and data processing in an application specific integrated circuit (ASIC). By combining this ASIC with precisely controllable stimulating micro LED arrays (µLED arrays), a bidirectional optical interface is created, which makes the need for external laser coupling via optical fibers obsolete and allows direct implantation. The optical sensors used are technologies beyond simple photodiodes: Single Photon Avalanche Diodes (SPADs) are highly sensitive optical sensors due to their high amplification and allow time-correlated single photon counting for the precise measurement of optical signals with dimensions in the micrometer range. Due to the possibility of manufacturing SPADs in standard CMOS technology, large sensor arrays for precise, spatially resolved measurements for neuronal applications can be produced, similar to the electrical deep brain probes already developed in the group [13,14]. A first test platform for the characterization of SPADs in CMOS has already been designed, simulated and produced in the first year of the project. A first ASIC was manufactured at XFab, on which SPADs including the necessary readout circuits, the active quenching circuits, and various digital and analog counting circuits are realized. This chip has already been put into operation with the help of the micro-assembly devices procured from HELIOS and has been characterized in first measurements (see Figure 3).

In simulations, dead times of less than 3 ns were achieved with the chip developed at the IIC, which has already been confirmed in first measurements. This makes the system one of the fastest devices currently available [15]. With the help of the counting circuits, which are also on chip, they can be used as precise optical sensors for neural interfaces. First measurements of the photon counter (see Figure 3, bottom right) show a good linearity of the system and allow high dynamic range light detection with 104 dB range. The developed sensor platform is complemented by µLED arrays with an active optical source for stimulation. A cooperation with TU Braunschweig resulting from the research project makes it possible to integrate industry-fabricated μLEDs on manufactured CMOS circuits with the help of the acquired micro-assembly infrastructure. These are driven by the driver circuits developed at IIC in low-power CMOS technology to precisely control neuronal activity. The advantage of μLEDs within optogenetics is their low power consumption and the spatial extension of the structures, which favors the realization of wireless and battery-free neural implants [16].

TET with the expertise in modelling and characterization of electromagnetic fields and transmission complements the development flow. In collaboration with IIC electromagnetic effects of brain implants are under consideration. State of the art of numerical techniques has to be adapted, combined, and thoroughly validated. A three-dimensional CAD models for the "Bi-directional Optical Transceiver for Neural Applications" is under development taken into consideration adjustments for electromagnetic full-wave simulations. For the analysis of signal and power integrity these models are functionalized by subdividing them into substructures (lines, coils, etc.) and setting suitable interfaces ("ports"). The power that is deposited in the body tissue has to be investigated [17] respecting exposure limits with specific absorption rate defined in [18].

Feasibility studies have been carried out by using various commercial and an in-house full-wave simulator [19] for comparison of numerical accuracy, computational effort, and, in general, suitability for the simulation of brain implants and their EMI in brain tissue (see figure 4).

Common full-wave simulation methods (based on FIT, FEM or MoM) all face enormous numerical challenges when it comes to simulating brain implants for even simple models of their operational environment. This applies to both the achievable accuracy and the computational effort required. This obstacle is mainly due to the multi-scale nature of the problem (smallest dimension depending on the approach <10-6 m, largest dimension 10-1 m) as well as the relatively wide and deep frequency band (<1 MHz to 1000 MHz), which can neither be categorized as a purely static/stationary field nor to a classic wave propagation. Another obstacle is the challenge in the structural and functional development of an electromagnetic model of a brain implant that covers the most important aspects and nevertheless is simple enough so that a simulation is still realistic. For this purpose, methods are currently being developed at TET that define suitable substructures and examine their influence on EMI separately. These substructures are to be integrated later into a complete model at a higher level. Correspondingly, no established method has currently been found that would allow to reliably predict the bio-EM compatibility of brain implants, i.e. their electromagnetic effects in the near and far range around their structures, within margins of +/- 10%. This motivates the preparation of a DFG project proposal. The preliminary conclusion is that - with regard to accuracy as well as computation effort - FIT performs very poorly with FEM being acceptable in this specific frequency range. The most favorable method seems to be MoM at least as long as the background is homogenous. These results indicate that probably a combination of MoM and /or FEM with a hierarchical modeling approach (e.g. based on Huygen's boxes) might be promising. This would make it at least partially possible to overcome the multi-scale nature of the problem and also to simulate "remote effects".


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