@inproceedings{BEZT15,
Author = {Andreas Becher, Jorge Echavarria, Daniel Ziener and Jürgen Teich},
Title = {Approximate Adder Structures on FPGAs.},
Year = {(2015).},
Month = {October},
Note = {dziener, ESD},
Address = {Paderborn / Germany},
Howpublished = {15-30 BEZT15 AC},
Booktitle = {<em>In Proceedings of the Workshop on Approximate Computing (AC)</em>},
Abstract = {In this paper, we propose novel approximate adder structures for FPGA-based implementations. These adder structures take advantage of the available FPGA resources. Compared with a full featured accurate adder, the longest path is significantly shortened which enables the clocking with an increased clock frequency. By using the proposed adder structures, the throughput of an FPGA-based implementation can be significantly increased. On the other hand, the resulting average error can be reduced compared to similar approaches for ASIC implementations.}
}

@COMMENT{Bibtex file generated on 2026-5-15 with typo3 si_bibtex plugin. Data from https://www.tuhh.de/es/home/publications }