Generation and Optimization of Real-Time Code for Embedded Multiprocess and Multiprocessor Systems (E = Mp2)

Fact Sheet

AcronymE = Mp2
NameGeneration and Optimization of Real-Time Code for Embedded Multiprocess and Multiprocessor Systems
(in German: Generierung und Optimierung von Echtzeitfähigem Code für Eingebettete Multiprozess- und Multiprozessor-Systeme)
Role of TUHHApplicant
Start Date01/02/2012
End Date30/09/2017
Funds DonorDeutsche Forschungsgemeinschaft (DFG)


During the design of safety-critical real-time systems like, e.g., airbag or flight attitude controllers, their behavior is specified at a high abstraction level. Compilers are an indispensible tool on the way from such a model-based specification to an actual implementation. For singlecore and singleprocess systems, compilers have recently been extended to support real-time properties already during compilation. For multiprocess and multiprocessor systems, compilers currently lack such a support despite of the increasing relevance of such parallel systems.

E = Mp2 aims to provide a software development environment for multiprocess and multiprocessor systems which produces efficient and optimized program code that provably meets real-time constraints. For this purpose, it has to be clarified how compiler and scheduler of an operating system need to cooperate. In addition, novel timing models supporting response times of processes and schedulability of entire systems need to be developed. Based on these timing models, novel compiler optimizations targeting on worst-case timing aspects and schedulability are designed.

In multiprocess systems, tasks can preempt each other and thus interfere. E = Mp2 develops compiler optimizations considering such context switches and scheduling strategies. In multiprocessor systems, different cores can access shared resources (e.g., buses or memories) at the same time and thus can cause additional interference. Therefore, this project works on compiler optimizations minimizing the worst-case timing of such systems by considering accesses to shared resources.

E = Mp2 Publications of the Embedded Systems Design Group

Title: Cache-Aware Instruction SPM Allocation for Hard Real-Time Systems. <em>In Proceedings of the 19th International Workshop on Software & Compilers for Embedded Systems (SCOPES)</em>
Written by: Arno Luppold, Christina Kittsteiner and Heiko Falk
in: May (2016).
Volume: Number:
on pages: 77-85
Series: 20160524-scopes-luppold.pdf
Address: St. Goar / Germany
ISBN: 10.1145/2906363.2906369
how published: 16-75 LKF16 SCOPES

Note: aluppold, hfalk, ESD, emp2, tacle, WCC

Abstract: To improve the execution time of a program, parts of its instructions can be allocated to a fast Scratchpad Memory (SPM) at compile time. This is a well-known technique which can be used to minimize the program's worst-case Execution Time (WCET). However, modern embedded systems often use cached main memories. An SPM allocation will inevitably lead to changes in the program's memory layout in main memory, resulting in either improved or degraded worst-case caching behavior. <br /> We tackle this issue by proposing a cache-aware SPM allocation algorithm based on integer-linear programming which accounts for changes in the worst-case cache miss behavior.