@inproceedings{WFM+:2008,
author = {Robert Wille and Goerschwin Fey and Marc Messing and Gerhard Angst and Lothar Linhard and Rolf Drechsler},
title = {Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking.},
year = {2008},
pages = {542-549},
note = {gfey, CE},
howpublished = {08-999 WFM+:2008 DSD_EUROMICRO},
booktitle = {EUROMICRO Symposium on Digital System Design (DSD)}
}

@COMMENT{Bibtex file generated on 2026-6-28 with typo3 si_bibtex plugin. Data from https://www.tuhh.de/es/de/home/publications }